Hardware Implementation of HEVC CABAC Binarizer
نویسندگان
چکیده
منابع مشابه
Design and Implementation of a High-Throughput CABAC Hardware Accelerator for the HEVC Decoder
HEVC is the new video coding standard of the Joint Collaborative Team on Video Coding. As in its predecessor H.264/AVC, Context-based Adaptive Binary Arithmetic Coding (CABAC) is a throughput bottleneck. This paper presents a hardware acceleration approach for transform coefficient decoding, the most time consuming part of CABAC in HEVC. In addition to a baseline design, a pipelined architectur...
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The standard H.264/AVC represents an enormous step forward in the field of the technologies of video compression. It guarantees a better efficiency of compression because of the biggest precision of the predictive functions and the better tolerance of the errors, also provides new possibilities for the creation of video encoders offering video flows of higher quality, frequency of image more im...
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This chapter provides an overview of the design challenges faced in the implementation of hardware HEVC decoders. These challenges can be attributed to the larger and diverse coding block sizes and transform sizes, the larger interpolation filter for motion compensation, the increased number of steps in intra prediction and the introduction of a new in-loop filter. Several solutions to address ...
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ژورنال
عنوان ژورنال: Journal of IKEEE
سال: 2014
ISSN: 1226-7244
DOI: 10.7471/ikeee.2014.18.3.356